1. Field of the Invention
The present invention generally relates to a thin film magnetic memory device. More particularly, the present invention relates to a random access memory (RAM) including memory cells having a magnetic tunnel junction (MTJ).
2. Description of the Background Art
An MRAM (Magnetic Random Access Memory) device has attracted attention as a memory device capable of non-volatile data storage with low power consumption. The MRAM device is a memory device capable of non-volatile data storage using a plurality of thin film magnetic elements formed in a semiconductor integrated circuit and also capable of random access to each thin film magnetic element.
In particular, recent announcement shows that the use of thin film magnetic elements having a magnetic tunnel junction (MTJ) as memory cells significantly improves performance of the MRAM device. The MRAM device including memory cells having a magnetic tunnel junction is disclosed in technical documents such as “A 10 ns Read and Write Non-Volatile Memory Array Using a Magnetic Tunnel Junction and FET Switch in each Cell”, ISSCC Digest of Technical Papers, TA7.2, February 2000, “Nonvolatile RAM based on Magnetic Tunnel Junction Elements”, ISSCC Digest of Technical-Papers, TA7.3, February 2000, and “A 256 kb 3.0V 1T1MTJ Nonvolatile Magnetoresistive RAM”, ISSCC Digest of Technical Papers, TA7.6, February 2001.
FIG. 39 schematically shows the structure of a memory cell having a magnetic tunnel junction (hereinafter, sometimes simply referred to as “MTJ memory cell”).
Referring to FIG. 39, the MTJ memory cell includes a tunneling magneto-resistance element TMR having an electric resistance varying according to the storage data level, and an access element ATR for forming a path of a sense current Is flowing through tunneling magneto-resistance element TMR in data read operation. Since a field effect transistor is typically used as access element ATR, access element ATR is hereinafter sometimes referred to as access transistor ATR. Access transistor ATR is coupled between tunneling magneto-resistance element TMR and a fixed voltage (ground voltage GND).
A write word line WWL for data write operation, a read word line RWL for data read operation, and a bit line BL are provided for the MTJ memory cell. Bit line BL serves as a data line for transmitting an electric signal corresponding to the storage data level in data read operation and data write operation.
FIG. 40 is a conceptual diagram illustrating data read operation from the MTJ memory cell.
Referring to FIG. 40, tunneling magneto-resistance element TMR has a ferromagnetic material layer FL having a fixed magnetization direction (hereinafter, sometimes simply referred to as “fixed magnetic layer”), a ferromagnetic material layer VL that is magnetized in the direction according to an external magnetic field (hereinafter, sometimes simply referred to as “free magnetic layer”), and an antiferromagnetic material layer AFL for fixing the magnetization direction of fixed magnetic layer FL. A tunneling barrier (tunneling film) TB of an insulator film is interposed between fixed magnetic layer FL and free magnetic layer VL. Free magnetic layer VL is magnetized either in the same (parallel) direction as, or in the opposite (antiparallel) direction to, that of fixed magnetic layer FL according to the write data level. Fixed magnetic layer FL, tunneling barrier TB and free magnetic layer VL form a magnetic tunnel junction.
In data read operation, access transistor ATR is turned ON in response to activation of read word line RWL. This allows a sense current Is to flow through a current path formed by bit line BL, tunneling magneto-resistance element TMR, access transistor ATR and ground voltage GND.
The electric resistance of tunneling magneto-resistance element TMR varies according to the relation between the magnetization directions of fixed magnetic layer FL and free magnetic layer VL. More specifically, when fixed magnetic layer FL and free magnetic layer VL have the same (parallel) magnetization direction, tunneling magneto-resistance element TMR has a smaller electric resistance than that of the case where they have opposite (antiparallel) magnetization directions.
Accordingly, when free magnetic layer VL is magnetized in the direction according to the storage data level, a voltage change produced on tunneling magneto-resistance element TMR by sense current Is varies depending on the storage data level. Therefore, by precharging bit lines BL to a prescribed voltage and then applying sense current Is to tunneling magneto-resistance element TMR, the storage data of the MTJ memory cell can be read by sensing the voltage on bit line BL.
FIG. 41 is a conceptual diagram illustrating data write operation to the MTJ memory cell.
Referring to FIG. 41, in data write operation, read word line RWL is inactivated and access transistor ATR is turned OFF. In this state, a data write current is applied to write word line WWL and bit line BL in order to magnetize free magnetic layer VL in the direction according to the write data level. The magnetization direction of free magnetic layer VL is determined by combination of the directions of the data write currents flowing through write word line WWL and bit line BL.
FIG. 42 is a conceptual diagram illustrating the relation between the data write current and the magnetization direction of the tunneling magneto-resistance element in data write operation to the MTJ memory cell.
Referring to FIG. 42, the abscissa H(EA) indicates a magnetic field that is applied to free magnetic layer VL of tunneling magneto-resistance element TMR in the easy-axis (EA) direction. The ordinate H(HA) indicates a magnetic field that is applied to free magnetic layer VL in the hard-axis (HA) direction. Magnetic fields H(EA), H(HA) respectively correspond to two magnetic fields produced by the currents flowing through bit line BL and write word line WWL.
In the MTJ memory cell, fixed magnetic layer FL is magnetized in the fixed direction along the easy axis of free magnetic layer VL. Free magnetic layer VL is magnetized either in the direction parallel or antiparallel (opposite) to that of fixed magnetic layer FL along the easy axis according to the storage data level (“1” and “0”) Hereinafter, R1 and R0 (where R1>R0) denote the electric resistances of tunneling magneto-resistance element TMR corresponding to the two magnetization directions of free magnetic layer VL.
The MTJ memory cell is thus capable of storing 1-bit data (“1” and “0”) according to the two magnetization directions of free magnetic layer VL.
The magnetization direction of free magnetic layer VL can be rewritten only when the sum of the applied magnetic fields H(EA) and H(HA) reaches the region outside the asteroid characteristic line in FIG. 42. In other words, the magnetization direction of free magnetic layer VL will not change if an applied data write magnetic field corresponds to the region inside the asteroid characteristic line.
As shown by the asteroid characteristic line, applying a magnetic field of the hard-axis direction to free magnetic layer VL enables reduction in magnetization threshold value required to change the magnetization direction along the easy axis.
When the write operation point is designed as in the example of FIG. 42, a data write magnetic field of the easy-axis direction is designed to have strength HWR in the MTJ memory cell to be written. In other words, a data write current to be applied to bit line BL or write word line WWL is designed to produce data write magnetic field HWR. Data write magnetic field HWR is commonly defined by the sum of a switching magnetic field HSW required to switch the magnetization direction and a margin ΔH. Data write magnetic field HWR is thus defined by HWR=HSW+ΔH.
In order to rewrite the storage data of the MTJ memory cell, that is, the magnetization direction of tunneling magneto-resistance element TMR, a data write current of at least a prescribed level must be applied to both write word line WWL and bit line BL. Free magnetic layer VL in tunneling magneto-resistance element TMR is thus magnetized in the direction parallel or antiparallel (opposite) to that of fixed magnetic layer FL according to the direction of the data write magnetic field along the easy axis (EA). The magnetization direction written to tunneling magneto-resistance element TMR, i.e., the storage data of the MTJ memory cell, is held in a non-volatile manner until another data write operation is conducted.
As described above, the electric resistance of tunneling magneto-resistance element TMR varies according to the magnetization direction that is rewritable by an applied data write magnetic field. Accordingly, non-volatile data storage can be realized by using the two magnetization directions of free magnetic layer VL in tunneling magneto-resistance element TMR as storage data levels (“1” and “0”), respectively.
When the MRAM device integrates such MTJ memory cells, the MTJ memory cells are commonly arranged in a matrix on a semiconductor substrate.
FIG. 43 is a conceptual diagram showing the array structure of the MTJ memory cells arranged in a matrix in an integrated manner.
In FIG. 43, the MTJ memory cells are arranged in n rows by m columns (where n, m is a natural number). As described before, bit line BL, write word line WWL and read word line RWL need be provided for each MTJ memory cell.
In data write operation, a prescribed data write current is applied to a write word line WWL and a bit line BL corresponding to the selected memory cell. For example, when the data is to be written to the shaded MTJ memory cell in FIG. 43, a data write current Ip of the row direction is applied to write word line WWL6, and a data write current Iw of the column direction is applied to bit line BL2. Accordingly, the selected MTJ memory cell receives both a data write magnetic field H(EA) of the easy-axis direction and a data write magnetic field H(HA) of the hard-axis direction beyond switching magnetic field HSW of FIG. 42. As a result, free magnetic layer VL is magnetized in the direction according to the write data level.
On the other hand, the non-selected memory cells of the same memory cell row and the same memory cell column as that of the selected memory cell (in the example of FIG. 43, the non-selected memory cells corresponding to write word line WWL6 and the non-selected memory cells corresponding to bit line BL2) receive only one of data write magnetic field H(EA) of the easy-axis direction and data write magnetic field H(HA) of the hard-axis direction beyond switching magnetic filed HSW. In these memory cells, the magnetization direction of free magnetic layer VL will not be rewritten. In other words, data write operation will not be conducted theoretically.
If a magnetic noise of the other direction is applied to the above non-selected memory cells, however, data may be erroneously written thereto.
A typical example of such a magnetic noise is a magnetic field generated by a current flowing through a power supply voltage line and a ground line for supplying an operating voltage to the peripheral circuitry for conducting data read operation and data write operation from and to the memory array. The current flowing through the power supply voltage line and the ground line are likely to reach a peak during operation of the peripheral circuitry. Therefore, the magnetic noise from these power; supply lines has a certain level of intensity.
Especially for improved integration, these power supply lines may be provided near the memory array, that is, near tunneling magneto-resistance elements TMR. In this case, the magnetic noise from the power supply lines may cause a reduced operation margin and erroneous writing. Therefore, such problems must be prevented in some way.